Single-Bit Comparator Simulation in Xilinx

Title of the exercise: Write a VHDL code for single bit digital comparator and simulate the code.
To develop Boolean expression for A>B, A=B, A<B, write a VHDL code and simulate the code in the software.

Material Required:
1. Xilinx Software Loaded PC = 1 Set
2. Printer = 1
3. FPGA kit Interface cable = 1
4. 9V DC Adopter = 1

1. Theory
2. Algorithm
3. Description
4. VHDL Code Writing
5. Compile and Run program.

1. Define Library functions.
2. Declare Entity and Architecture.
3. Describe functionality.
4. End source code.
5. Compile and Run program.

1-bit comparator has two inputs and three outputs.

The 1-bit comparator has two inputs and three outputs.

The 1-bit comparator circuit:

Truth table

1-bit comparator Output

VHDL Code for 1-bit comparator

library IEEE;

entity comparator_1bit is
    Port ( A,B : in std_logic;
           G,S,E: out std_logic);
end comparator_1bit;
architecture comp_arch of comparator_1bit is
   G <= A and (not B);
   S <= (not A) and B;
   E <= A xnor B;
end comp_arch;

Verified by simulation three outputs.

Questions with answers:
1. What is single bit digital comparator?
Ans: A Comparator is a combinational circuit that gives output in terms of A>B, A<B, and A=B.

2. Which type of Gates used in comparator?
XOR, NOT, AND gates used.

3. Write One Bit Comparater truth table?

Video Tutorial:


Subramanian MK, currently serving as a workshop instructor at Sakthi Polytechnic College, Erode Tamil Nadu. With a career spanning 25 + years, Subramanian MK has dedicated himself to advancing knowledge in Electronics and Communication Engineering (ECE). His passion for exploring new technologies has led to the development of numerous projects, showcasing expertise in IoT and PCB design.

Articles: 504

Leave a Reply

Your email address will not be published. Required fields are marked *

This site uses Akismet to reduce spam. Learn how your comment data is processed.


Hi, How can I help you?