The circuit for ramp and pedestal triggering of two SCR’s connected in antiparallel for controlling power in an AC load. This circuit, R acts as a potential divider. Wiper (pot) R controls the value of pedestal voltage. The diodes allows the capacitor C to be quickly charged to V through the low resistance of the upper portion of R.
The position wiper (Pot) on R always setting the voltage v is less than the UJT firing voltage . When the wiper setting is such that is small, the voltage V charges the capacitor Vc reaches and UJT starts conduction. A pulse produced at the primary as well as at secondaries of the transformer due to discharging of capacitor through UJT and primary of the pulse transformer.