JK Flip Flop Simulation with Xilinx Software using VHDL Code

JK Flip Flop Simulation in Xilinx using VHDL Code

Title of the experiment: Write a VHDL code for JK flip flop and simulate using software or implement it in FPGA kit.

Introduction:

To develop the code for JK flipflop and simulate using software or implement it in FPGA kit.

Material required:

1. Xilinx Software Loaded PC = 1 Set.
2. Printer = 1.
3. FPGA kit Interface cable = 1.
4. 9V DC Adopter = 1.

Description:

1. Theory
2. Algorithm
3. Description
4. VHDL Code Writing
5. Compile and Run program.

ALGORITHM:

1. Define Library functions.
2. Declare Entity and Architecture.
3. Describe functionality.
4. End source code.
5. Compile and Run program.

Description

A JK flip-flop is a refinement of the SR flip-flop in that the indeterminate state of the SR type is defined in the JK type.

THEORY:

Inputs J and K behave like inputs S and R to set and clear the flip-flop (note that in a JK flip-flop, the letter J is for set and the letter K is for clear)

JK Flip Flop Circuit:

JK Flipflop truth table:

VHDL Code for JK Flip Flop:

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity JKFF is
port(
j: in std_logic;
k: in std_logic;
clk: in std_logic;
rst: in std_logic;
q: out std_logic;
qb: out std_logic);
end JKFF;

architecture behavioral of JKFF is
begin
process(j,k,clk,rst)
begin
if(rst='1') then
 q <= '0';
 qb <= '0';
elsif (rising_edge(clk)) then
 if(j/=k) then
  q <= j;
  qb <= not j;
 elsif(j='1' and k='1') then
  q <= not j;
  qb <= j;
 end if;
end if;
end process;
end behavioral;

Result:
Inputs J and K behave like inputs S and R to set and clear the flip-flop (note that in a JK flip-flop, the letter J is for set and the letter K is for clear)

Questions with answers:
1. What is JK JJ?
A JK flip-flop is a sequential bi-state single-bit memory device named after its inventor by Jack Kil.

2. Use of JK JJ?
Ans: The JK Flip-flop is similar to the SR Flip-flop but there is no change in state when the J and K inputs are both LOW.

3.Type of Flip Flop?
Four types namely D-Flip Flop, T- Flip Flop, SR- Flip Flop and JK- Flip Flop.

Video Tutorial:

Subramanian
Subramanian

Subramanian MK, currently serving as a workshop instructor at Sakthi Polytechnic College, Erode Tamil Nadu. With a career spanning 25 + years, Subramanian MK has dedicated himself to advancing knowledge in Electronics and Communication Engineering (ECE). His passion for exploring new technologies has led to the development of numerous projects, showcasing expertise in IoT and PCB design.

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