JK Flip Flop Simulation in Xilinx using VHDL Code Title of the experiment: Write a VHDL code for JK flip flop and simulate using software or implement it in FPGA kit. Introduction: To develop the code for JK flipflop and…
Experiment: Gate triggering of SCR with various gate currents. Aim: To simulate Gate triggering of SCR with various gate currents. Material required: 1. MULTISIM Software Loaded PC 1 No. 2. Printer 1 No. Procedure: 1. Theory. 2. Symbol. 3. Design…
Title of the experiment Rectifier circuits (Half wave and Full wave Bridge Rectifiers with Capacitor filter) AIM: To simulate Rectifier circuits like Half wave and Full wave Bridge Rectifiers with Capacitor filter. Facilities/material required: 1. MULTISIM Software Loaded PC 1…
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