Astable Multi-Vibrator Using 555 Timer IC

Astable Multi-Vibrator Using 555 Timer IC

The multi-vibrator circuit having no stable state is called astable multi-vibrator. The circuit oscillates between two quasi-stable states. Hence it is also called as free-running multi vibrator. The astable circuits can be used in square wave, rectangular wave and ramp generator applications.

The power supply voltage Vcc is connected across pins 8 and 1. Pin 2 and 6 are connected to the capacitor C1. Pin 7 is connected with resistor 4.7k in series with 5.6K to the pin of 6. The output taken from pin 3. Pin 4 is connected to Vcc to ensure the Q2 remains at all times.

Pin 5 is connected to ground through a 0.01 microF capacitor. Pin 7 is connected to junction of two resistors R1,R2. The capacitor C1 charges from Vcc through these resistors. Measure the output waveforms with Digital DSO or Analog CRO. The resistor R1, R2 values are (R1=3.3K, R2=5.6K) indicated with their resistor colour code.

OPERATION:

Step-1 Capacitor C1 Voltage below 1/3 Vcc.
The inverting input of comparator 2 is below V R3 (=1/3Vcc).
Hence comparator 2 output goes high, driving the flip-flop into its set condition.

Flip-flop output Q2 becomes low. Making Q1 to be switched OFF.
With Q1 off, capacitor C1 commences to charge exponentially through resistors R1 and R2.
Now the output voltage at pin 3 is High.
Step-2 Capacitor C1 voltage reaches 2/3 Vcc.

When the charging capacitor voltage becomes equal to V(R2+R3) = 2/3 Vcc the comparator 1 output switches to high.
The flip-flop is driven into its reset condition.
Flip-flop output Q2 becomes high, Q1 to be switch on.
Capacitor C1 is rapidly discharged by Q1.
The output voltage at pin 3 switches to low level.
Discharge of capacitor C1 continues until its voltage falls below 1/3 Vcc.

At this point the output of comparator 2 goes high, Triggering the flip-flop to its low output state and switching Q1 OFF once again. The cycle has now recommenced, and it continues repetitively. Hence without giving and external trigger signal, the astable circuit oscillates between LOW and HIGH level output.
The time duration of these oscillations can be designed as follows.
The capacitor charging time, tc=0.693(R1+R2)C1.
The capacitor discharging time, td=0.693 R2 C1.